Digital Signal Processing Infrastructure
Get the latest infrastructure for developing digital logic courses using Xilinx technology. Select and obtain software tools and University boards for the lab. Attend a Professor workshop to get you up to speed. Use Xilinx IP cores, getting started materials, and academic partner materials for developing lab exercises.
Get the latest Development Tools
- Install the latest full version of Xilinx development tools in your lab
- System Generator for DSP (required) -
Create designs in Matlab/Simulink and generate hardware targeting the latest FPGAs.
- ISE® Foundation™ (required)
- Generate a bitstream and configure the FPGA. User can optionally
connect the System Generator design to a larger design (written in VHDL or Verilog) that contains
interfaces to external board components such as audio CODECs, external memory devices, video
CODECs, etc.
- EDK (optional, but highly recommended) -
Create MicroBlaze™ or PowerPC® embedded systems
targeting supported Xilinx University boards.
Export the System Generator design as a pcore
(peripheral) and connect it within EDK.
- Chipscope™ Pro (optional, but highly recommended) -
Debug designs in real-time running on-chip.
- Obtain DSP tools from XUP alliance members
Get a University Board
- Obtain academically priced boards for education and research.
Get Started with Xilinx Technology
- Refer to Support Resources
- Access online Documentation, Tutorials, Webcasts, Discussion Forums, and more
- Professors may submit online webcases for technical issues
- Professors may register to attend the DSP Design Flow workshop to get up to speed with the
ISE Foundation software and latest University boards.
- Access free Xilinx reference designs
Access Curriculum Resources
- Access curriculum resources including IP cores, reference designs, links
to online University course materials, and more.
Contact XUP
For general questions or comments, please send an email to xup@xilinx.com
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